2022
R16 Assembler and Simulator - Custom 16-bit ISA inspired on RISC-V
I'm working on a two-pass assembler and a simulator in parallel with the instruction set. The idea is to test the instructions out before committing to a hardware implementation.
The assembler has local and global labels, the usual pseudo instructions for handling bytes, words and strings etc., and it boasts RPN expression parsing for constant evaluation and such :).
It outputs a binary file and a listing, both serve as input for the simulator.
The simulator has single-stepping and breakpoint capability, shows register contents and dumps memory. A terminal is provided for simple I/O. Shown is the execution of a program that prints "Hello World".
This project is still a work in progress. Both the assembler and simulator are written in C++.
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